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d a t a sh eet product speci?cation supersedes data of 1997 nov 27 file under integrated circuits, ic19 1999 oct 04 integrated circuits OQ2535HP sdh/sonet stm16/oc48 multiplexer
1999 oct 04 2 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP features normal and loop (test) modes 3.3 v ttl compatible data inputs differential current-mode logic (cml) clock and data outputs 5 v ttl clock output (low speed interface) high input sensitivity (100 mv for the high speed clock input) boundary scan test (bst) at low speed interface, in accordance with ieee std 1149.1-1990 low power dissipation (typically 1.65 w). general description the OQ2535HP is a 32-channel multiplexer intended for use in stm16/oc48 applications. it combines data from a total of 32 78 mbits/s input channels onto a single 2.5 gbits/s output channel. it features 3.3 v ttl data inputs and a 5 v ttl clock output at the low speed interface, and cml compatible inputs and outputs at the high speed interface. ordering information block diagram type number package name description version OQ2535HP hlqfp100 plastic heat-dissipating low pro?le quad ?at package; 100 leads; body 14 14 1.4 mm sot470-1 handbook, full pagewidth mgk351 4 enl synsel1 synsel2 trst tms tck tdi tdo cdiv dout doutq cout coutq dloop dloopq cloop cin cinq dioa dioc cloopq clock 4 : 1 mux synchronization divide by 4 622 mhz OQ2535HP 78 mhz 2.5 ghz band gap reference 2 band gap reference 1 divide by 8 bst logic 4 8 : 1 mux 622 mbits/s 2.5 gbits/s 78 mbits/s load pulse 2 58 59 62 32 5 3 7 6 13 10 78 5 14, 37, 63, 85, 86 v dd 4 12, 39, 87, 88 v ee 60 v cc v cc(t) bgcap2 bgcap1 31 (2) (1) gnd 16 refc2 38 refc1 61 90 91 82 83 65 66 68 69 71 72 74 75 d0 to d31 fig.1 block diagram. (1) see chapter pinning for d0 to d31 pin numbers. (2) pins 1, 4, 8, 9, 11, 15, 17, 21, 25, 36, 40, 56, 64, 67, 70, 73, 76, 77, 79, 80, 81, 84, 89, 92 to 98 and 100.
1999 oct 04 3 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP pinning symbol pin type (1) description gnd 1 s ground trs 2 i test reset input for bst mode (active low) tck 3 i test clock input for bst mode gnd 4 s ground tms 5 i test mode select input for bst mode tdo 6 o serial test data output for bst mode tdi 7 i serial test data input for bst mode gnd 8 s ground gnd 9 s ground bgcap1 10 a pin for connecting external band gap decoupling capacitor (4 8 : 1 mux) gnd 11 s ground v ee 12 s supply voltage ( - 4.5 v) cdiv 13 o 78 mhz clock output v dd 14 s supply voltage (+3.3 v) gnd 15 s ground v cc(t) 16 s supply voltage for ttl buffer (+5.0 v); not connected internally to v cc gnd 17 s ground d31 18 i 78 mbits/s data input channel for d31 d27 19 i 78 mbits/s data input channel for d27 d23 20 i 78 mbits/s data input channel for d23 gnd 21 s ground d19 22 i 78 mbits/s data input channel for d19 d15 23 i 78 mbits/s data input channel for d15 d11 24 i 78 mbits/s data input channel for d11 gnd 25 s ground d7 26 i 78 mbits/s data input channel for d7 d3 27 i 78 mbits/s data input channel for d3 d30 28 i 78 mbits/s data input channel for d30 d26 29 i 78 mbits/s data input channel for d26 d22 30 i 78 mbits/s data input channel for d22 d18 31 i 78 mbits/s data input channel for d18 d14 32 i 78 mbits/s data input channel for d14 d10 33 i 78 mbits/s data input channel for d10 d6 34 i 78 mbits/s data input channel for d6 d2 35 i 78 mbits/s data input channel for d2 gnd 36 s ground v dd 37 s supply voltage (+3.3 v) refc2 38 a pin for connecting external reference decoupling capacitor (3.3 v cmos reference) v ee 39 s supply voltage ( - 4.5 v)
1999 oct 04 4 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP gnd 40 s ground d29 41 i 78 mbits/s data input channel for d29 d25 42 i 78 mbits/s data input channel for d25 d21 43 i 78 mbits/s data input channel for d21 d17 44 i 78 mbits/s data input channel for d17 d13 45 i 78 mbits/s data input channel for d13 d9 46 i 78 mbits/s data input channel for d9 d5 47 i 78 mbits/s data input channel for d5 d1 48 i 78 mbits/s data input channel for d1 d28 49 i 78 mbits/s data input channel for d28 d24 50 i 78 mbits/s data input channel for d24 d20 51 i 78 mbits/s data input channel for d20 d16 52 i 78 mbits/s data input channel for d16 d12 53 i 78 mbits/s data input channel for d12 d8 54 i 78 mbits/s data input channel for d8 d4 55 i 78 mbits/s data input channel for d4 gnd 56 s ground d0 57 i 78 mbits/s data input channel for d0 synsel2 58 i selection input 2 for synchronization pulse timing synsel1 59 i selection input 1 for synchronization pulse timing v cc 60 s supply voltage (+5.0 v) refc1 61 a pin for connecting external reference decoupling capacitor (for standard ttl reference) enl 62 i loop mode enable (active low) v dd 63 s supply voltage (+3.3 v) gnd 64 s ground dloop 65 o data output to demultiplexer ic oq2536 (loop mode) dloopq 66 o inverted data output to demultiplexer ic oq2536 (loop mode) gnd 67 s ground cloop 68 o clock output to demultiplexer ic oq2536 (loop mode) cloopq 69 o inverted clock output to demultiplexer ic oq2536 (loop mode) gnd 70 s ground cin 71 i clock input from vco ic cinq 72 i inverted clock input from vco ic gnd 73 s ground dioa 74 a anode of temperature diode array dioc 75 a cathode of temperature diode array gnd 76 s ground gnd 77 s ground bgcap2 78 a pin for connecting external band gap decoupling capacitor (4 : 1 mux) gnd 79 s ground symbol pin type (1) description
1999 oct 04 5 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP note 1. pin type abbreviations: o = output, i = input, s = power supply, a = analog function. gnd 80 s ground gnd 81 s ground cout 82 o clock output to laser driver ic coutq 83 o inverted clock output to laser driver ic gnd 84 s ground v dd 85 s supply voltage (+3.3 v) v dd 86 s supply voltage (+3.3 v) v ee 87 s supply voltage ( - 4.5 v) v ee 88 s supply voltage ( - 4.5 v) gnd 89 s ground dout 90 o data output to laser driver ic doutq 91 o inverted data output to laser driver ic gnd 92 s ground gnd 93 s ground gnd 94 s ground gnd 95 s ground gnd 96 s ground gnd 97 s ground gnd 98 s ground i.c. 99 - internally connected, to be left open-circuit gnd 100 s ground symbol pin type (1) description
1999 oct 04 6 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP fig.2 pin configuration. handbook, full pagewidth 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 80 79 78 77 76 dioc dioa gnd cinq cin gnd cloopq cloop gnd dloopq dloop gnd v dd enl refc1 v cc synsel1 synsel2 d0 gnd d4 d8 d12 d16 d20 mgk350 gnd trst tck gnd tms tdo tdi gnd gnd bgcap1 gnd v ee cdiv v dd gnd v cc(t) gnd d31 d27 d23 gnd d19 d15 d11 gnd gnd gnd bgcap2 gnd gnd gnd i.c. gnd gnd gnd gnd gnd gnd gnd doutq dout gnd v ee v ee v dd v dd gnd coutq cout gnd d18 d14 d10 d6 d2 gnd v dd refc2 v ee gnd d29 d25 d21 d17 d13 d9 d5 d1 d28 d24 d7 d3 d30 d26 d22 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 OQ2535HP
1999 oct 04 7 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP functional description the OQ2535HP is a 32-channel multiplexer intended for use in stm16/oc48 applications. it multiplexes 32 78 mbits/s input channels onto a single 2.5 gbits/s output channel. the multiplexing is performed in two stages. the 32 input channels are fed into four 8 : 1 multiplexers to generate four 622 mbits/s channels. these four channels are then combined into a single 2.5 gbits/s data stream. the enl control input is used for switching between normal and loop modes. when loop mode is enabled, ( enl = low), the output signal is switched to dloop and dloopq (these outputs could be connected to the dloop and dloopq inputs on the oq2536hp demultiplexer to form part of a test loop). the 2.5 ghz clock at cin and cinq is used as the system reference. it is divided down to 78 mhz and made available on the cdiv ttl output for timing the input data (d0 to d31). low bit rate stage: 4 8 : 1 mux this part of the circuit consists of four 8-bit shift registers, each acting as an 8 : 1 multiplexer, together with a synchronization block. the 32 data input signals are loaded into the shift registers before being shifted out on a 622 mhz clock. the load pulse for the shift registers is generated in the synchronization block. the inputs synsel1 and synsel2 can be used to adjust the phase of the load pulse with respect to the input data (see table 3) to synchronize the data and clock signals. high bit rate stage: 4 : 1 mux the four 622 mbits/s data outputs from the low bit rate stage are combined into a single 2.5 gbits/s data stream in two stages: two 2 : 1 multiplexers are used to generate two 1244 mbits/s data streams; these signals are then fed into a third 2 : 1 multiplexer to generate the 2.5 gbits/s data stream. the 2.5 gbits/s serial data stream is passed either to the dout and doutq outputs (normal mode), or to the dloop and dloopq outputs (loop mode). the output sequence is d31 (msb) to d0 (lsb). data and clock output buffers are terminated internally with 100 w resistors to gnd and are capable of driving 50 w loads. the unused output buffers are switched off to help minimize power dissipation. the outputs cloop, cloopq, dloop and dloopq are terminated internally with 100 w resistors to gnd and are specifically designed to drive 50 w printed-circuit board transmission lines. the 2.5 ghz clock connected to cin and cinq is terminated internally with 50 w to gnd. power supply connections the power supply pins need to be individually decoupled using chip capacitors mounted as close as possible to the ic. if multiple decoupling capacitors are used for a single supply node, they must be placed close to each other to avoid rf resonance. to minimize low frequency switching noise in the vicinity of the OQ2535HP, all power supply lines should be filtered once by an lc-circuit with a low cut-off frequency (as shown in the application diagram, fig.6). v cc(t) needs to be filtered separately via an lc-circuit because of the high switching currents present at the cdiv ttl output. as this current contains only 78 mhz harmonics, filtering can be achieved with relatively small values of l and c. ground connection the ground connection on the printed-circuit board needs to be a large copper area fill connected to a common ground plane with low inductance. rf connections a coupled stripline or microstrip with an odd mode characteristic impedance of 50 w (nominal value) should be used for the rf connections on the printed-circuit board. the connections should be kept as short as possible. this applies to the cml differential line pairs cin and cinq, dout and doutq, cout and coutq, dloop and dloopq, and cloop and cloopq. in addition, the following lines should not vary in length by more than 5 mm: cin and cinq dout, doutq, cout and coutq dloop, dloopq, cloop and cloopq. interface to transmit logic the 78 mbits/s interface lines, cdiv and d0 to d31, should not vary in length by more than 20 mm. the parasitic capacitance of these lines should be as small as possible.
1999 oct 04 8 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP esd protection all pads are protected by esd protection diodes with the exception of the high frequency outputs dout, doutq, dloop, dloopq, cout, coutq, cloop and cloopq and clock inputs cin and cinq. cooling in many cases it is necessary to mount a special cooling device on the package. the thermal resistance from junction to case, r th j-c and from junction to ambient, r th j-a , are given in chapter thermal characteristics. since the heat-slug in the package is connected to the die, the cooling device should be electrically isolated. to calculate if a heatsink is necessary, the maximum allowed total thermal resistance r th is calculated as: (1) where: r th = total thermal resistance from junction to ambient in the application t j = junction temperature t amb = ambient temperature. as long as r th is greater than r th j-a of the oq2536hp including environmental conditions such as air flow and board layout, no heatsink is necessary. for example if t j = 120 c, t amb =55 c and p tot = 1.65 w, then: (2) which is more than the worst case r th j-a = 33 k/w, so no heatsink is necessary. another example; if for safety reasons t j should stay as low as 110 c, while t amb =85 c and p tot = 2 w, then: (3) in this case extra cooling is needed. the thermal resistance of the heatsink is calculated as follows: (4) where: r th h-a = thermal resistance from heatsink to ambient r th c-h = thermal resistance from case to heatsink r th j-c = thermal resistance from junction to case, see chapter thermal characteristics. if for instance r th c-h = 0.5 k/w and r th j-a = 33 k/w then: (5) built in temperature sensor three series-connected diodes have been integrated for measuring junction temperature. the diode array, accessed by means of the dioa (anode) and dioc (cathode) pins, has a temperature dependency of approximately - 6 mv/ c. with a diode current of 1 ma, the voltage will be somewhere in the range of 1.7 to 2.5 v, depending on temperature. boundary scan test (bst) interface boundary scan test logic has been implemented for all digital inputs and outputs on the low frequency interface, in accordance with ieee std 1149.1-1990 . all scan tests other than sample mode are available. the boundary scan test logic consists of a tap controller, a bypass register, a 2-bit instruction register, a 32-bit identification register and a 36-bit boundary scan register (the last two are combined). the architecture of the tap controller and the bypass register is in accordance with ieee recommendations. the four command modes, selected by means of the instruction register, are: extest (00), preload (01), idcode (10) and bypass (11). all boundary scan test inputs, tdi, tms, tck and trst, have internal pull-up resistors. the maximum test clock frequency at tck is 12 mhz. r th t j t amb C p tot ----------------------- - = r th 120 55 C () 1.65 --------------------------- 39.4 k/w == r th 110 85 C () 2.0 --------------------------- 12.5 k/w == r th h-a 1 r th -------- 1 r th j-a -------------- C ? ?? 1 C r th j-c C r th c-h C r th h-a 1 12.5 ----------- 1 33 ------ C ? ?? 1 C 3.1 C 17.0 k/w table 1 bst identi?er code note 1. lsb is shifted out first on the tdo pin. version oq 2535 (binary) philips semiconductors lsb (1) 0001 01 00 1001 1110 0111 0000 0010 101 1
1999 oct 04 9 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP table 2 bst bit order note 1. lsb is shifted out first on the tdo pin. bit number symbol pin 35 (msb) cdiv 13 34 enl 62 33 synsel2 58 32 synsel1 59 31 d31 18 30 d30 28 29 d29 41 28 d28 49 27 d27 19 26 d26 29 25 d25 42 24 d24 50 23 d23 20 22 d22 30 21 d21 43 20 d20 51 19 d19 22 18 d18 31 17 d17 44 16 d16 52 15 d15 23 14 d14 32 13 d13 45 12 d12 53 11 d11 24 10 d10 33 9d9 46 8d8 54 7d7 26 6d6 34 5d5 47 4d4 55 3d3 27 2d2 35 1d1 48 0 (lsb) (1) d0 57
1999 oct 04 10 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP limiting values in accordance with the absolute maximum rating system (iec 134). thermal characteristics note 1. the thermal resistance from junction to ambient is strongly depending on the board design and airflow. the values given in the table are typical values and are measured on a single sided test board with dimensions of 76 114 1.6 mm. better values can be obtained when mounted on multilayer boards with large ground planes. symbol parameter min. max. unit v cc , v cc(t) supply voltage - 0.5 +6.0 v v ee supply voltage - 6.0 +0.5 v v dd supply voltage - 0.5 +5.0 v v n dc voltage pins 18 to 20, 22 to 24, 26 to 35, 41 to 55 and 57 - 0.5 v dd + 0.5 v pins 2, 3, 5, 7, 38, 61 and 62 - 0.5 v cc + 0.5 v pins 65, 66, 68, 69, 71, 72, 82, 83, 90 and 91 - 1.0 +0.5 v pins 10 and 78 v ee - 0.5 0.5 v pins 74 and 75 v ee - 0.5 v cc + 0.5 v i n dc current pins 6 and 13 - 50 ma pins 74 and 75 - 10 ma p tot total power dissipation - 2.35 w t j junction temperature - 120 c t stg storage temperature - 65 +150 c symbol parameter conditions value unit r th j-c thermal resistance from junction to case 2.6 k/w r th j-a thermal resistance from junction to ambient see note 1 airflow = 0 ft/min 33 k/w airflow = 100 ft/min 28 k/w airflow = 200 ft/min 25 k/w airflow = 400 ft/min 22 k/w airflow = 600 ft/min 20 k/w
1999 oct 04 11 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP dc characteristics all typical values are at t amb =25 c and at typical supply voltages; minimum and maximum values are valid over the entire ambient temperature range and supply voltage range. symbol parameter conditions min. typ. max. unit general v cc , v cc(t) supply voltage note 1 4.75 5.0 5.25 v v ee supply voltage - 4.75 - 4.5 - 4.25 v v dd supply voltage 3.14 3.3 3.47 v i cc supply current - 2.3 4 ma i cc(t) supply current - 20 40 ma i ee supply current - 265 400 ma i dd supply current - 20 28 ma p tot total power dissipation - 1.65 2.35 w t j junction temperature -- 120 c t amb ambient temperature - 40 - +85 c ttl 3.3 v inputs: d0 to d31 ; note 2 v il low-level input voltage -- 0.8 v v ih high-level input voltage 2.0 -- v i il low-level input current - 65 - 0 m a i ih high-level input current 0 - 110 m a ttl inputs: enl, synsel1, synsel2, tdi, tck, tms and trst v il low-level input voltage -- 0.8 v v ih high-level input voltage 2.0 -- v i il low-level input current note 3 - 100 - 0 m a i ih high-level input current note 3 0 - 210 m a cml clock inputs: cin and cinq; note 4 v i(p-p) input voltage (peak-to-peak value) 50 w measurement system 100 250 500 mv v io permitted input offset voltage - 25 - +25 mv v i ,v iq input voltages - 600 - +250 mv z i single ended input impedance for dc signal - 50 -w ttl outputs: cdiv and tdo; note 5 v ol low-level output voltage i ol =4ma - 0.3 0.5 v v oh high-level output voltage i oh = - 400 m a 2.4 4.0 - v i oz output current in high-impedance state -- 1 m a cml outputs in normal mode: cout, coutq, dout and doutq; note 4 v o(p-p) output voltage (peak-to-peak value) outputs terminated externally with 50 w resistors 230 300 500 mv v oo output offset voltage - 25 0 +25 mv v o ,v oq output voltages - 600 - 0mv z o output impedance for dc signal - 100 -w
1999 oct 04 12 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP notes 1. v cc and v cc(t) require the same power supply voltage. however, a filter is needed to isolate v cc(t) because of the high peak currents that occur at 78 mhz. 2. the output sequence is d31 (msb) to d0 (lsb). 3. only for inputs enl, synsel1 and synsel2. tdi, tms, tck and trst are connected to v cc through 90 k w resistors. 4. see fig.3 for symbol definitions. 5. tdo is switched to high impedance state if bst is inactive. 6. the temperature diode array can be used to measure the temperature of the die. the temperature dependency of this voltage is approximately - 6 mv/k. cml outputs in loop mode: cloop, cloopq, dloop and dloopq; note 4 v o(p-p) output voltage (peak-to-peak value) outputs terminated externally with 50 w 230 300 500 mv v oo output offset voltage - 25 0 +25 mv v o ,v oq output voltages - 600 - 0mv z o output impedance for dc signal - 100 -w temperature diode array d v dioa-dioc diode voltage range; note 6 i i(d) =1ma - 2.1 - v symbol parameter conditions min. typ. max. unit fig.3 logic level symbol definitions for cml. handbook, full pagewidth mgk144 v io v i(max) v iqh v ih v iql v il v i(min) v i(p-p) gnd cml input v oo v o(max) v oqh v oh v oql v ol v o(min) v o(p-p) gnd cml output
1999 oct 04 13 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP timing typical values at t amb =25 c and at typical supply voltages; minimum and maximum values are valid over the entire ambient temperature range and supply voltage range. notes 1. the set-up and hold times given are valid for synsel1 = synsel2 = high. different synsel1, synsel2 combinations will produce different set-up and hold times (see table 3). 2. all cml outputs must be terminated externally with 50 w to gnd. the specified timing characteristics are applicable in both normal and loop modes. table 3 timing relationship between the clock edge and the data valid region (minimum values) symbol parameter conditions min. typ. max. unit ttl input timing f clk(cdiv) low speed output clock frequency f clk(cin) = 2.488 ghz - 77.76 - mhz t r(cdiv) ,t f(cdiv) cdiv rise/fall time capacitive load of 15 pf -- 2600 ps t su input data set-up time note 1 1200 -- ps t h input data hold time note 1 2600 -- ps cml output timing; note 2 f clk(cout) output clock frequency f clk(cin) = 2.488 ghz - 2.488 - ghz t cdv clock edge to data valid time -- 250 ps t di data invalid time -- 120 ps t r(cml) ,t f(cml) cml output rise/fall time -- 150 ps d cout output clock duty factor 45 50 55 % synsel2 synsel1 t su t h unit high high 1200 2600 ps high low 2800 1000 ps low high 1700 2100 ps low low 3300 500 ps
1999 oct 04 14 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP fig.4 ttl input timing. handbook, full pagewidth t r t f t su t h valid data mgk352 1.5 v d0 to d31 cdiv t cy(cdiv) 1.5 v 2.0 v 0.8 v fig.5 cml output timing. handbook, full pagewidth + 100 mv 0 v - 100 mv + 100 mv - 100 mv t cdv t di t cy(cout) cout - coutq, cloop - cloopq dout - doutq, dloop - dloopq t f t r mgk353
1999 oct 04 15 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP application information handbook, full pagewidth mgk354 tms tck tdo tdi dout gnd or v cc doutq cout coutq ddq cl clq synsel1 refc2 synsel2 dloop dloopq cloop cin cinq cloopq dloop dloopq cloop cloopq vco 2.488 ghz pll loop filter phase detector data interface boundary scan test equipment micro- controller oq2536 dmux oq2545 laser driver laser diode oq2535 2 62 5 3 7 6 gnd 90 91 82 83 la laq 65 66 68 69 enl trst (2) (1) 16 60 72 71 58 59 38 61 78 10 13 68 nf refc1 bgcap2 68 nf 10 nf v ee bgcap1 cdiv 10 nf d0 to d31 d0 to d31 v ee (3) system reference ferrite bead ferrite bead ferrite bead ferrite bead 1 m f 100 nf v cc v ee 1 m f 100 nf v dd 1 m f 100 nf 1 m f 100 nf v cc(t) fig.6 application diagram. (1) v dd pins 14, 37, 63, 85 and 86 should be connected together, and to the filter network. (2) v ee pins 12, 39, 87 and 88 should be connected together, and to the filter network. (3) all gnd pins (pins 1, 4, 8, 9, 11, 15, 17, 21, 25, 36, 40, 56, 64, 67, 70, 73, 76, 77, 79, 80, 81, 84, 89, 92 to 98 and 100) must be connected directly to the printed-circuit board ground plane.
1999 oct 04 16 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP package outline unit a max. a 1 a 2 a 3 b p ce (1) eh e ll p z y w v q references outline version european projection issue date iec jedec eiaj mm 1.6 0.20 0.05 1.5 1.3 0.25 0.28 0.16 0.18 0.12 14.1 13.9 0.5 16.25 15.75 1.15 0.85 7 0 o o 0.12 0.1 0.2 1.0 j (2) dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. 2. heatsink intrusion 0.0127 maximum. 0.75 0.45 10.15 9.15 sot470-1 97-01-13 d (1) (1) (1) 14.1 13.9 h d 16.25 15.75 e z 1.15 0.85 d b p e e detail x j b 25 c d h b p e h a 1 a a 2 v m b d z d a z e e v m a x 1 100 76 75 51 50 26 q l p l (a ) 3 y w m w m 0 5 10 mm scale hlqfp100: plastic heat-dissipating low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm sot470-1 pin 1 index
1999 oct 04 17 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations reflow soldering is often used. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 230 c. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
1999 oct 04 18 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. package soldering method wave reflow (1) bga, lfbga, sqfp, tfbga not suitable suitable hbcc, hlqfp, hsqfp, hsop, htqfp, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.
1999 oct 04 19 philips semiconductors product speci?cation sdh/sonet stm16/oc48 multiplexer OQ2535HP notes
? philips electronics n.v. sca all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. internet: http://www.semiconductors.philips.com 1999 68 philips semiconductors C a worldwide company for all other countries apply to: philips semiconductors, international marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 3 figtree drive, homebush, nsw 2140, tel. +61 2 9704 8141, fax. +61 2 9704 8139 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101 1248, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 20 0733, fax. +375 172 20 0773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 68 9211, fax. +359 2 68 9102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 800 943 0087 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: sydhavnsgade 23, 1780 copenhagen v, tel. +45 33 29 3333, fax. +45 33 29 3905 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615 800, fax. +358 9 6158 0920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 4099 6161, fax. +33 1 4099 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 2353 60, fax. +49 40 2353 6300 hungary: see austria india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: pt philips development corporation, semiconductors division, gedung philips, jl. buncit raya kav.99-100, jakarta 12510, tel. +62 21 794 0040 ext. 2501, fax. +62 21 794 0080 ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, via casati, 23 - 20052 monza (mi), tel. +39 039 203 6838, fax +39 039 203 6800 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5057 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381, fax +9-5 800 943 0087 middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland : al.jerozolimskie 195 b, 02-222 warsaw, tel. +48 22 5710 000, fax. +48 22 5710 001 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 319762, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 58088 newville 2114, tel. +27 11 471 5401, fax. +27 11 471 5398 south america: al. vicente pinzon, 173, 6th floor, 04547-130 s?o paulo, sp, brazil, tel. +55 11 821 2333, fax. +55 11 821 2382 spain: balmes 22, 08007 barcelona, tel. +34 93 301 6312, fax. +34 93 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 5985 2000, fax. +46 8 5985 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2741 fax. +41 1 488 3263 taiwan: philips semiconductors, 6f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2886, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: yukari dudullu, org. san. blg., 2.cad. nr. 28 81260 umraniye, istanbul, tel. +90 216 522 1500, fax. +90 216 522 1813 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 208 730 5000, fax. +44 208 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381, fax. +1 800 943 0087 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 62 5344, fax.+381 11 63 5777 printed in the netherlands 465012/50/02/pp 20 date of release: 1999 oct 04 document order number: 9397 750 03901

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